产品概要
描述
Stellar integration MCUs have been designed to meet the requirements of domain controllers and ECUs with high integration requested in the architectures of connected, updatable, automated, and electrified cars. They have superior real-time and safe performance (with highest ASIL-D capability). Bringing hardware-based virtualization technology to MCUs, they ease the development and integration of multiple source software onto the same hardware while maximizing the resulting software performance. They offer high-efficiency OTA reprogramming capability with fast new image download and activation. They also provide high-speed security cryptographic services, for instance for network authentication.
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性能一览
- AEC-Q100 qualified
- SR6 integration MCUs:
- Have superior real-time and safe performance (with highest ASIL-D capability)
- Bring hardware-based virtualization technology to MCUs for simplified multiple software integrations at optimized performance
- Have built-in no downtime OTA reprogramming capability (with built-in dual-image mechanism)
- Offer high-speed security cryptographic services, for example for network authentication
- Cores and accelerators
- 4 × 32-bit Cortex®‑R52+ cores (in split-lock configuration):
- Configurable as either 4 cores (none of them in lockstep configuration) or 2 cores (all of them in lockstep configuration)
- Arm® v8-R compliant
- Single precision floating-point unit (FPU)
- New privilege level for real-time virtualization
- Up to 500 MHz
- 2 cores with Neon™ extensions (for example SIMD, dual precision FPU)
- 1 Cortex®‑M4 multipurpose accelerator running at up to 200 MHz, in lockstep configuration
- 2 eDMA engines (1 in lockstep configuration)
- Ethernet switch:
- 2 external gigabit (GB) ports
- 4 data + 1 host internal virtualized ports
- Time-sensitive networking
- Audio-video transport protocol (AVTP)
- Media clock recovery/generation
- L2 forwarding, L2+ routing
- ASIL-B target
- 4 × 32-bit Cortex®‑R52+ cores (in split-lock configuration):
- Memories
- xMemory: up to 16 MB extensible on-chip nonvolatile memory (NVM) depending on ordered part number:
- PCM (phase-change memory) as nonvolatile memory
- Up to 15 MB code NVM, with A/B swap OTA mechanism (up to 2× 7.5 MB)
- 1024 KB HSM-dedicated code NVM
- 256 KB data NVM (128 KB + 128 KB dedicated to HSM)
- Up to 1632 KB on-chip general-purpose SRAM
- xMemory: up to 16 MB extensible on-chip nonvolatile memory (NVM) depending on ordered part number:
- Security: 2nd generation hardware security module
- Cybersecurity: ISO/SAE 21434 compliance (refer to the cybersecurity reference manual for details)
- On-chip high-performance security module with full support for e-safety vehicle intrusion protected applications (EVITA)
- Symmetric and asymmetric cryptography processor
- High-performance lock-stepped AES-light security subsystem for fast ASIL-D cryptographic services
- Safety: comprehensive new-generation ASIL-D safety concept
- New state-of-the-art safety measures at all levels of the architecture for most efficient implementation of ISO 26262 ASIL-D functionalities
- Complete hardware virtualization architecture built on Cortex®‑R52+ new privilege mode (best-in-class software isolation, real-time support for multiple virtual machines/applications)
- Device standby/low-power modes
- Versatile low-power modes
- Ultra-low power: standby mode for lowest quiescent current with optimized active subsystem (for example standby RAM) and wake-up capability
- Smart low-power: smart power mode with Cortex®‑M4 subsystem, extended communications interfaces, and ADC peripheral
- Peripheral, I/O, and communication interfaces
- 16 LINFlexD modules
- 6 queued serial peripheral interface (SPIQ) modules
- 2 DSPI with shifted PWM serialization support for lighting applications
- 4 I²C interfaces
- Enhanced audio support that enables audio over Ethernet:
- Ethernet controller with AVB support
- Medial clock recovery with integrated audio PLL
- Two integrated interchip sound (I²S)/time-division multiplexed (TDM) interfaces
- 2 SENT modules (4 channels each)
- 2 PSI5 modules (2 channels each)
- Enhanced analog-to-digital converter system with:
- 2 separate 12-bit SAR analog converters (including one supervisor/safety ADC).
- 1× 9-bit SAR analog converter for device standby/low-power mode
- Advanced timed I/O capability:
- Generic timer module (GTM4104)
- Communication interfaces:
- Two 10/100/1000 Mbit/s Ethernet controllers compliant with IEEE 802.3-2008: IPv4 and IPv6 checksum modules, AVB, VLAN, and EMC optimized SGMII, and supporting 10BASE-T1S with OPEN Alliance 3-pin (OA3p) interface
- 8 modular controller area network (MCAN) modules, supporting CAN classic and CAN FD®
- 1 CAN XL® interface
- 16 LINflexD modules
- External memory interfaces
- 2 octo-SPI IPs to support HyperBus™ memory (flash/RAM) devices
EDA Symbols, Footprints and 3D Models
STMicroelectronics - SR6G3C5
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Quality and Reliability
| Part Number | Marketing Status | Package | Grade | 符合RoHS级别 | Material Declaration** |
|---|---|---|---|---|---|
| SR6G3C5XMC52FX0R | Target Product is in design feasibility stage. No commitment taken to produce. | FPBGA 17X17X1.8 348 B0.55 P0.8 | Automotive Safety Cybersecurity | Ecopack2 | |
SR6G3C5XMC52FX0R
Package:
FPBGA 17X17X1.8 348 B0.55 P0.8Material Declaration**:
(**) st.com上提供的材料声明表单可能是基于包装系列中最常用的封装的通用文档。因此，它们可能不是100%适用于特定的设备。有关特定设备的信息，请联系 销售支持。
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Sample & Buy
| Part Number | 供货状态 | Budgetary Price (US$)*/Qty | 从ST订购 | Order from distributors | Package | Packing Type | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Operating Temperature (°C) (min) | Operating Temperature (°C) (max) | CPU Clock Frequency (MHz) (max) | Flash Size (kB) (Data) | |
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| SR6G3C5XMC52FX0R | | | distributors 无法联系到经销商，请联系我们的销售办事处 |
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SR6G3C5XMC52FX0R Target