产品概述
描述
The ST4G3234 is a dual supply low voltage CMOS 4-BIT BUS BUFFER level translator fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation.
This IC is intended for one-way asynchronous communication between data buses. The input and output power down protections disable the device when both power supply are down, so that the buses are effectively isolated.
The input tolerant buffers allow to translate VCCB compatible signals and greater signals than VCCB up/down to VCCA .
All inputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
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所有功能
- ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015); MM > 200V - LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) - ROHS Compliant for FLIPCHIP Package
- OPERATING VOLTAGE RANGE:
VCCA(OPR) = 1.4V to 3.6V (1.2V Data Retent) VCCB(OPR) = 1.4V to 3.6V (1.2V Data Retent) - 26Ω SERIES RESISTOR ON A SIDE OUTPUTS
- HIGH SPEED: tPD= 4.4ns (MAX.) at TA=85˚C VCCB = 1.65V; VCCA = 3.0V
- SYMMETRICAL OUTPUT IMPEDANCE:
|IOHA| = IOLA= 10mA MIN at VCCA = 3.0V; VCCB = 1.4V to 3.6V |IOHA| = IOLA= 8mA MIN at VCCA = 2.3V; VCCB\t = 1.4 to 3.6V)\t - LOW POWER DISSIPATION:
ICCA = ICCB = 5μA(MAX.) at TA=85˚C - POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
- MAX DATA RATES:
380 Mbps (1.8V to 3.3V translation) 260 Mbps (<1.8V to 3.3V translation) 260 Mbps (Translate to 2.5V) 210 Mbps (Translate to 1.5V) 100 Mbps (Translate to 1.2V) - BALANCED PROPAGATION DELAYS:
tPLH tPHL
- ESD PERFORMANCE:
