产品概述
描述
The ST2G3236 is a dual supply, low-voltage CMOS 2-bit bus transceiver produced with sub-micron silicon gate and five-layer metal wiring C2MOS technology. Designed for use as an interface between a 3.3 V bus and a 2.5 V or 1.8 V bus in mixed 3.3 V/1.8 V, 3.3 V/2.5 V and 2.5 V/1.8 V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation.
This IC is intended for two-way asynchronous communication between data buses, and the direction of data transmission is determined by DIR inputs. The A-port interfaces with the 3 V bus, and the B-port with the 2.5 V and 1.8 V bus.
All inputs are equipped with protection circuits to protect against static discharge, giving them 2 kV of ESD immunity and transient excess voltage.
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所有功能
- High speed:
- tPD= 6.2 ns (max) at TA= 85 °C
- VCCB= 1.8 V
- VCCA= 3.3 V
- Low power dissipation:
- ICCA= ICCB= 5 μA (max) at TA= 85 °C
- Symmetrical output impedance:
- |IOHA| = IOLA= 7 mA min at VCCA= 2.75 V; VCCB= 1.65 V or 2.3 V
- |IOHB| = IOLB= 2 mA min at VCCA= 2.3 V or 3.0 V; VCCB= 1.65 V
- Balanced propagation delays:
- TPLH≈ TPHL
- Power-down protection on inputs and outputs
- 26 Ω series resistor on A side
- Operating voltage range:
- VCCA(OPR) = 1.4 V to 3.6 V
- VCCB(OPR) = 1.4 V to 3.6 V
- Max data rates:
- 380 Mbps (1.8 V to 3.3 V translation)
- 260 Mbps (<1.8 V to 3.3 V translation)
- 260 Mbps (translate to 2.5 V)
- 210 Mbps (translate to 1.5 V)
- Latch-up performance exceeds 500 mA (JESD17)
- ESD performance:
- HBM > 2 kV (MIL STD 883 method 3015)
- MM > 200 V
- High speed:
EDA符号、封装和3D模型
意法半导体 - ST2G3236
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