产品概述
描述
The EVLSTGAP3S3IF is a half-bridge evaluation board designed to evaluate the STGAP3S3IF isolated single gate driver.
The STGAP3S3IF is characterized by 3 A current capability, rail-to-rail outputs, and optimized UVLO and DESAT protection thresholds for IGBTs, which makes the device optimal for high-power motor drivers in industrial applications.
The gate driver has a single output pin and an internal Miller CLAMP, which optimizes positive and negative gate spikes' suppression during fast commutations in half-bridge topologies.
The board is supplied by the 5 V VAUX connection, which fed the isolated DC-DC converters for the low-side and high-side driving sections. The gate drivers can be directly supplied by VAUX if a 5 V MCU is used, or by the onboard linear regulator if a 3.3 V MCU is used. The PWM and Reset inputs can be easily controlled through dedicated connectors while diagnostic outputs are connected to an onboard LED.
Device protection features (Desaturation and Miller clamp) are connected to the recommended network on the board and can be easily evaluated through the board test points.
Dual input pins allow the selection of signal polarity control and implementation of HW interlocking protection to avoid cross-conduction in case of controller malfunction.
The device allows implementing negative gate driving, and the onboard isolated DC-DC converters allow working with optimized driving voltage for IGBTs.
The EVLSTGAP3S3IF board allows evaluating all of the STGAP3S3IF features while operating with a bus voltage up to 650 V.
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所有功能
- Board
- Half-bridge configuration
- High-voltage rail up to 650 V (limited by the IGBT’s and capacitor’s rating)
- STGP10M65DF2 IGBTs: 650 V, 10 A
- Compatible with 5 V and 3.3 V MCUs
- VDD logic supplied by onboard-generated 3.3 V or VAUX = 5 V
- Onboard isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.4 kVpk maximum isolation
- Easy jumper selection of driving voltage configuration:+15/0 V; +15/-4.7 V; +12/0 V; +12/-4.7 V
- Fault LED indicators
- Maximum working voltage across isolation: 650 V
- RoHS compliant
- STGAP3S3IF device
- Driver current capability: 3 A source/sink @ 25 °C
- 75 ns input-output propagation delay
- Internal Miller CLAMP
- UVLO function
- Desaturation protection
- Gate driving voltage up to 32 V
- Negative gate driving voltage
- 3.3 V, 5 V TTL/CMOS inputs with hysteresis
- Temperature shutdown protection
- Reinforced galvanic isolation:Isolation voltage VISO = 5.7 kVRMS (UL 1577)Transient overvoltage VIOTM = 8 kVPEAK (IEC 60747-17)Max. repetitive isolation voltage VIORM = 1.2 kVPEAK (IEC 60747-17)
- Board
质量与可靠性
| 料号 | Marketing Status | 包 | 等级规格 | 符合RoHS级别 | WEEE Compliant | Longevity Commitment | Longevity Starting Date | 材料声明** |
|---|---|---|---|---|---|---|---|---|
| EVLSTGAP3S3IF | 批量生产 产品已量产 | CARD | 工业 | Ecopack1 | - | - | - | |
EVLSTGAP3S3IF
Package:
CARDMaterial Declaration**:
(**) st.com上提供的材料声明表单可能是基于包装系列中最常用的封装的通用文档。因此，它们可能不是100%适用于特定的设备。有关特定设备的信息，请联系 销售支持。
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样片和购买
| 料号 | 供货状态 | Budgetary Price (US$)*/Qty | 从ST订购 | Order from distributors | 包 | 包装类型 | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | 供应商 | 核心产品 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| EVLSTGAP3S3IF | | | distributors 无法联系到经销商，请联系我们的销售办事处 |
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EVLSTGAP3S3IF 批量生产