STiH237

已停产
Design Win

具有集成解调器和低功耗备用控制器的HD卫星STB处理器

下载数据摘要

产品概述

描述

The STiH237 uses the latest process technology to provide a cost-effective, feature rich, highly integrated SoC for set-top boxes (STBs). It is targeted at the advanced decoding STB market across satellite networks, and is suitable for operator markets (with advanced security) and retail markets worldwide.

The STiH237 provides a solution for operators and manufacturers to specify a range of cost-effective, high performance zapper STBs, with content delivery possible using broadcast or broadband networks, or both (hybrid STBs).

The STiH237 integrates a high performance satellite receiver supporting DVB compliant reception, channel demodulation, and forward error correction (FEC). The single stream demodulator is compatible with DVB-S2 (QPSK/8PSK), DVB-S (QPSK) and legacy DirecTVTMtransmission standards.

  • 所有功能

    • ST40 applications CPU with 256 KB L2 cache
    • 16-bit LMI supporting DDR2/DDR3
    • Decoding of H264, MPEG2, VC-1 and AVS HD video streams
    • 3DTV decoding and display compatible with HDMI 1.4a
    • Extensive connectivity (2 × USB 2.0 ports; Ethernet MII/RMII/TMII port; SD/MMC card port; PCIe)
    • Secure boot from SLC NAND Flash or Serial NOR Flash; eMMC booting option
    • Low-power process and architecture
    • Integrated low power standby controller
    • High-quality video resizing and de-interlacing
    • Integrated Ethernet PHY
    • Targets two layer PCBs for cost-effective zapper STB applications
    • Integrates DVB-S/DVB-S2 single stream demodulation and FEC

EDA符号、封装和3D模型

意法半导体 - STiH237

Speed up your design by downloading all the EDA symbols, footprints and 3D models for your application. You have access to a large number of CAD formats to fit with your design toolchain.

Please select one model supplier :

Symbols

符号

Footprints

封装

3D model

3D模型