ST54J

批量生产
Design Win

单晶片NFC控制器和安全元件

下载数据摘要

产品概述

描述

The ST54J is a single-die solution integrating a contactless front-end (CLF) and a secure element called ST54J_CLF and ST54J_SE. It is designed for integration in mobile devices and NFC-compliant products.

The ST54J_CLF includes near-field communication (NFC) functions in the three operating modes: Card Emulation, Reader/Writer and Peer-to-Peer communication.

It is best in class in terms of RF output power (up to 2 W). With its outstanding output power and optimized efficiency, the ST54J driver can be connected to metal frame antennas. Thanks to improved low-power card detection sensitivity, in Reader/Writer mode, the ST54J_CLF operating in low-power mode is capable of detecting the presence of a card/tag from a distance greater than the Reader mode performance.

In Card Emulation mode, the ST54J_CLF is capable of operating without an external quartz or an external reference clock source, contributing to further reducing the current consumption of the system in low-power mode. Moreover, thanks to its improved field detection sensitivity, the ST54J_CLF is capable, in low-power mode, of detecting the presence of a reader RF field from a distance greater than the CE mode performance.

The ST54J_SE is a serial access microcontroller designed for secure mobile applications. It incorporates the most recent generation of Arm® processors for embedded secure systems. The SecurCore® SC300™ 32-bit RISC core is built on the Cortex®-M3 core, with additional security features to help protect against advanced forms of attacks.

  • 所有功能

      • Single die integrating an NFC controller (contactless front-end – CLF) and a secure element (SE)
      • Small WLCSP81 package, ECOPACK-compliant
    • NFC controller
      • Arm® Cortex®-M3 microcontroller
      • 100% re-flashing capability for firmware update
      • Enhanced active load modulation technology
      • Enhanced TX drive up to 2 W with support of an external 5 V DC/DC converter for TX supply
      • Optimized for extremely small or metal frame antennas
      • Optimized power consumption modes
      • Ultralow power Hibernate mode with selectable field detection for low-power mode support
      • Proprietary In-Frame Synchronization (IFS) in Card Emulation (CE) to ensure stability in battery Low and Switched OFF modes
      • System clock
        • Fractional-N PLL input range of 13.56 to 76.8 MHz
        • 27.12 MHz external crystal oscillator
      • Automatic wakeup via communication interfaces, internal timers, GPIO, RF field or tag detection
    • RF communications
      • Active and passive Peer-to-Peer
        • ISO/IEC 18092 – NFCIP-1 Initiator & Target
      • Reader/Writer mode
        • NFC Forum Type 1/2/3/4/5 tags
        • ISO/IEC 15693
        • MIFARE®
        • FeliCa™
      • Card Emulation mode
        • ISO/IEC 14443 Type A & Type B
        • FeliCa
        • MIFARE
    • External communication interfaces
      • Two master SWP interfaces operating at up to 1.695 Mbit/s
      • Slave I²C interface supporting Standard, Fast, Fast-mode Plus and High Speed modes
      • Slave SPI interface up to 26 MHz
      • ISO/IEC 7816-3 interface
      • General-purpose inputs/outputs (GPIOs)
    • Internal communication interfaces
      • CLF/SE SWP interface
      • 120 Mbit/s interprocessor communication (IPC) based on a shared internal memory
    • Secure microcontroller
      • Arm® SecurCore® SC300™ 32-bit RISC core cadenced at 100 MHz
      • Up to 2048 Kbytes of user Flash memory
      • 2 Kbytes of memory cache
      • 64 Kbytes of user RAM
      • Power saving Standby and Hibernate states
    • Secure operating system
      • Supports state of the art secure element operating systems:
        • Java Card™ 3.0.5
        • GlobalPlatform® 2.3 with Amdts
        • EMVCo™ certification
      • Security-certified according to CC EAL5+
      • Hardware security-enhanced DES & AES accelerators
      • MIFARE® Classic cryptography hardware accelerator
      • NESCRYPT coprocessor for public key cryptography algorithm
    • Electrical characteristics
      • Battery voltage support from 2.4 V to 5.0 V
      • I/O dedicated voltage level (VPS_IO) from 1.62 V to 3.3 V
      • Supports Class B and C operating conditions for UICC
      • Ambient operating temperature −25 to + 85 °C

EDA符号、封装和3D模型

意法半导体 - ST54J

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符号

Footprints

封装

3D model

3D模型

质量与可靠性

产品型号 Marketing Status 等级规格 符合RoHS级别 材料声明**
ST54J-WLCSP
批量生产
WLCSP 工业 N/A

ST54J-WLCSP

Package:

WLCSP

Material Declaration**:

Marketing Status

批量生产

Package

WLCSP

Grade

Industrial

RoHS Compliance Grade

N/A

(**) st.com上提供的材料声明表单可能是基于包装系列中最常用的封装的通用文档。因此,它们可能不是100%适用于特定的设备。有关特定设备的信息,请联系 销售支持

样片和购买

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ST54J-WLCSP
Available at distributors

经销商的可用性 ST54J-WLCSP

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ST54J-WLCSP 批量生产

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产品型号:

ST54J-WLCSP

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(*) 建议转售单价(美元)仅用于预算用途。如需以当地货币计价的报价,请联系您当地的 ST销售办事处 或我们的 经销商