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- V1.0 First release: adding support to STM32G431xx/G471xx/G441xx/G473xx/G474xx/G484xx/G483xx devices
- V1.1 Renamed SHCRS into SHCSR in SCB, Updated MPU/IWDG/WWDG, Corrected FPU_CPACR base address
- V1.2 The COMP_C4CSR address offset has been fixed, NVIC peripheral has been updated
- V1.3 Corrected ADC12 address and registers
- V1.4 Fixing base address for SCB, Renaming SCB_ACTRL into SCB_ACTLR
- V1.5 Adding support to STM32G491xx/G4A1xx
- V1.6 Fixing ADC_CFGR fields, Adding missing TIM16/17_OR1 register
- V1.7 Fixing FDCAN registers in all G4 series
- V1.8 Fixing COMP registers in all G4 series and updating License section
- V1.9 Fixing FDCAN interrupts in all G4 series according to latest update in RM0440
- V2.0 Updating PWR and RCC in all G4 series according to RM0440-Rev6
- V2.1 Updating FDCAN,RCC & Clean up in all G4 series according to RM0440-Rev7
- V2.2 Update in FDCAN according to RM0440-Rev7
- V2.3 Update in interrupts for G4 family
- V2.4 Update in FLASH register for G4 family
- V2.5 Update in EXTI register for G4 family
- V2.6 Update in HRTIM register for G474 and G484
- V2.7 Update in TIMx registers for STM32G4 devices
- V2.8 Update in interrupts for STM32G4 devices
- V2.9 Update in FLASH registers for STM32G4 devices
- V3.0 Update in OPAMP and FLASH registers for STM32G4 devices
For
complete documentation on STM32 Microcontrollers
visit www.st.com/STM32
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