****************************************************************************
* WARNING : please consider following remarks before usage
*
* 1) All models are a tradeoff between accuracy and complexity (ie. simulation
* time).
* 2) Macromodels are not a substitute to breadboarding, they rather confirm the
* validity of a design approach and help to select surrounding component values.
*
* 3) A macromodel emulates the NOMINAL performance of a TYPICAL device within
* SPECIFIED OPERATING CONDITIONS (ie. temperature, supply voltage, etc.).
* Thus the macromodel is often not as exhaustive as the datasheet, its goal
* is to illustrate the main parameters of the product.
*
* 4) Data issued from macromodels used outside of its specified conditions
* (Vcc, Temperature, etc) or even worse: outside of the device operating
* conditions (Vcc, Vicm, etc) are not reliable in any way.
*
****************************************************************************
****
****  LMV331-393-339  Spice macromodel subckt
***
***  May 2013
****                      
************ CONNECTIONS: 
****                 NON-INVERTING INPUT
****                  |  INVERTING INPUT
****                  |   |     POSITIVE POWER SUPPLY
****                  |   |      |      NEGATIVE POWER SUPPLY
****                  |   |      |       |     OUTPUT  
****                  |   |      |       |      |     
****                  |   |      |       |      |  
.SUBCKT LMV331   VP  VM  VCCP VCCN  VS
X_C_RISE V_VALORI_C_RISE 0 V_C_RISE VREF VCCAP_PSPICE
+PARAMS: CAP_scale={CAP_SCALE__C_RISE} Rserie=1
X_C_FALL V_VALORI_C_FALL 0 VREF V_C_FALL VCCAP_PSPICE
+PARAMS: CAP_scale={CAP_SCALE__C_FALL} Rserie=1
X_C_VOD V_VALORI_C_VOD 0 VB_D_VOD VREF VCCAP_PSPICE 
+PARAMS: CAP_scale={CAP_SCALE__C_VOD} Rserie=1
X_C_VCC V_VALORI_C_VCC 0 VB_D_VOD_VCC VREF VCCAP_PSPICE
+PARAMS: CAP_scale={CAP_SCALE__C_VCC} Rserie=1
    C84 VM VP 3p
    M_NMOS2 VO_DIFF_PLUS VM VEE_N VCCN_ENHANCED MOS_N L={L} W={W}
    M_NMOS1 VO_DIFF_MINUS NET232 VEE_N VCCN_ENHANCED MOS_N L={L} W={W}
    IEE_N VEE_N VCCN_ENHANCED DC {IEE}
    V58 NET302 NET235 DC {VD_COMPENSAZIONE}
    V59 NET261 NET326 DC {VD_COMPENSAZIONE}
    VREADIO VB_4 VS DC 0
    VVLIM_LOW_VB NET342 NET241 DC {VD_COMPENSAZIONE}
    VI0 NET232 VP DC -500.0u
    VPROT_IN_P_VCCP NET242 NET277 DC {V_DPROT}
    V_ENHANCE_VCCN VCCN_ENHANCED VCCN DC {VCCN_ENHANCE}
    VVLIM_HIGH_VB NET267 NET330 DC {VD_COMPENSAZIONE}
    V_ENHANCE_VCCP VCCP_ENHANCED VCCP DC {VCCP_ENHANCE}
    VPROT_IN_M_VCCN NET250 NET404 DC {V_DPROT}
    VPROT_IN_P_VCCN NET252 NET253 DC {V_DPROT}
    VPROT_IN_M_VCCP NET390 NET269 DC {V_DPROT}
    D40 NET235 VB_D_VOD DIODE_NOVd
    DILIM_SINK VB_3_SINK VB_3 DIODE_ILIM
    D41 VB_D_VOD NET261 DIODE_NOVd
    D_ENABLE_FALL V_C_FALL VB_D_G_RF DIODE_rf
    D3 VB_D_G NET267 DIODE_NOVd
    DPROT_IN_M_VCCP VM NET269 DIODE_VLIM
    D_ENABLE_RISE VB_D_G_RF V_C_RISE DIODE_rf
    D4 NET241 VB_D_G DIODE_NOVd
    DPROT_IN_M_VCCN NET250 VM DIODE_VLIM
    DPROT_IN_P_VCCP NET232 NET277 DIODE_VLIM
    DPROT_IN_P_VCCN NET252 NET232 DIODE_VLIM
    
*    E_C_FALL V_VALORI_C_FALL 0 PWL(1) VCCP VCCN ( 1.8 ,
*+{457p/CAP_SCALE__C_FALL} ) ( 2.7 , {125p/CAP_SCALE__C_FALL} ) ( 5 ,
*+{114p/CAP_SCALE__C_FALL} )
    E_C_FALL V_VALORI_C_FALL 0 VALUE={TABLE( V(VCCP,VCCN) , 1.8 , 457p ,
+ 2.7 , 125p , 5 , 114p)/CAP_SCALE__C_FALL} 

    E_RO_3 VB_3 VB_4 VALUE={IF( I(VreadIo)>0
+,I(VreadIo)*V(Ro_3_val_VOH),I(VreadIo)*V(Ro_3_val_VOL) )}
    E65 NET302 0 VCCN 0 1.0
    E_VDEP_SINK_3 VDEP_SINK 0 VALUE={IF( abs(I(VreadIo))<1m , 0 ,
+V(val_vdep_sink_filtered))}

*   E_ICCSAT_LOW ICC_OUT_LOW 0 PWL(1) VCCP VCCN ( 1.8 , {20e-6 - IEE} ) (
*+2.7 , {21e-6 - IEE} ) ( 5 , {23e-6 - IEE} )
 E_ICCSAT_LOW ICC_OUT_LOW 0 VALUE={TABLE( V(VCCP,VCCN) , 1.8 , {20e-6 - IEE} ,
+2.7 , {21e-6 - IEE} , 5 , {23e-6 - IEE} )}

    E_VDEP_SINK_2 VAL_VDEP_SINK_FILTERED 0
+VALUE={IF(V(val_vdep_sink)<=0 , 0 , V(val_vdep_sink))}

*    E_ICCSAT_HIGH ICC_OUT_HIGH 0 PWL(1) VCCP VCCN ( 1.8 , {22e-6 - IEE} )
*+( 2.7 , {23e-6 - IEE} ) ( 5 , {26e-6 -IEE} )
    E_ICCSAT_HIGH ICC_OUT_HIGH 0 VALUE={TABLE( V(VCCP,VCCN) ,  1.8 , {22e-6 - IEE} ,
+ 2.7 , {23e-6 - IEE} , 5 , {26e-6 -IEE} )}

    E66 NET326 0 VCCP 0 1.0
    EVLIM_HIGH_VB NET330 0 VCCP 0 1.0
    
*    E_C_VCC V_VALORI_C_VCC 0 TABLE {IF(V(VP,VM)>0,V(Vccp,Vccn),
*+-V(Vccp,Vccn))}=(-5 {3p/CAP_scale__C_VCC}) (-2.7
*+{0.75p/CAP_scale__C_VCC}) (-1.8 {1f/CAP_scale__C_VCC}) (1.8
*+{1f/CAP_scale__C_VCC}) (2.7 {0.7p/CAP_scale__C_VCC}) (5
*+{2p/CAP_scale__C_VCC})
    E_C_VCC  V_VALORI_C_VCC 0  VALUE={IF( V(VP,VM)>0, 
    +TABLE( V(VCCP,VCCN), 1.8 , 1f , 2.7 , 0.7p , 5 , 2p),
    +TABLE( V(VCCP,VCCN), 1.8 , 1f , 2.7 , 0.75p , 5 , 3p))/CAP_scale__C_VCC}  
        
    EVLIM_LOW_VB NET342 0 VCCN 0 1.0    
    
*    E_C_VOD V_VALORI_C_VOD 0 PWL(1) VP VM ( -100m , {15p/CAP_SCALE__C_VOD} ) (
*+-80m , {15p/CAP_SCALE__C_VOD} ) ( -60m , {15p/CAP_SCALE__C_VOD} ) ( -55m
*+, {15p/CAP_SCALE__C_VOD} ) ( -45m , {15p/CAP_SCALE__C_VOD} ) ( -40m ,
*+{14.5p/CAP_SCALE__C_VOD} ) ( -30m , {12p/CAP_SCALE__C_VOD} ) ( -20m ,
*+{8.8p/CAP_SCALE__C_VOD} ) ( -15m , {7.75p/CAP_SCALE__C_VOD} ) ( -10m ,
*+{6.8p/CAP_SCALE__C_VOD} ) ( 10m , {10.5p/CAP_SCALE__C_VOD} ) ( 15m ,
*+{11.6p/CAP_SCALE__C_VOD} ) ( 20m , {13.5p/CAP_SCALE__C_VOD} ) ( 30m ,
*+{15p/CAP_SCALE__C_VOD} ) ( 40m , {15p/CAP_SCALE__C_VOD} ) ( 45m ,
*+{15p/CAP_SCALE__C_VOD} ) ( 55m , {15p/CAP_SCALE__C_VOD} ) ( 60m ,
*+{15p/CAP_SCALE__C_VOD} ) ( 80m , {15p/CAP_SCALE__C_VOD} ) ( 100m ,
*+{15p/CAP_SCALE__C_VOD} )
    E_C_VOD V_VALORI_C_VOD 0 VALUE={TABLE( V(VP,VM) , -100m , 15p ,
+-80m , 15p , -60m , 15p , -55m , 15p , -45m , 15p , -40m , 14.5p , -30m , 12p ,
+-20m , 8.8p , -15m , 7.75p , -10m , 6.8p , 10m , 10.5p , 15m , 11.6p , 20m , 13.5p ,
+30m , 15p , 40m , 15p , 45m , 15p , 55m , 15p , 60m , 15p , 80m , 15p , 100m , 
+15p)/CAP_SCALE__C_VOD}

*    E_C_RISE V_VALORI_C_RISE 0 PWL(1) VCCP VCCN ( 1.8 ,
*+{750p/CAP_SCALE__C_RISE} ) ( 2.7 , {190p/CAP_SCALE__C_RISE} ) ( 5 ,
*+{119p/CAP_SCALE__C_RISE} )
    E_C_RISE V_VALORI_C_RISE 0 VALUE={TABLE( V(VCCP,VCCN) , 1.8 , 750p ,
+ 2.7 , 190p , 5 , 119p)/CAP_SCALE__C_RISE} 

    E2_REF NET406 0 VCCN 0 1.0
    EILIM_SINK VB_3_SINK VDEP_SINK VB_3 0 1.0
    E_VREF VREF 0 NET400 0 1.0
    E1_REF NET370 0 VCCP 0 1.0
    
*    E_RO_3_VAL_VOL RO_3_VAL_VOL 0 PWL(1) VCCP VCCN ( 1.8 , 14 ) ( 2.7 , 7
*+) ( 5.0 , 2 )
    E_RO_3_VAL_VOL RO_3_VAL_VOL 0 VALUE={TABLE( V(VCCP,VCCN) , 1.8 , 14 , 2.7 , 7 ,
+ 5.0 , 2 )} 
 
    E_VDEP_SINK_1 VAL_VDEP_SINK 0 VALUE={(165.1739130434785
+-158.03140096618372*V(Vccp,Vccn) +
+3.0193236714976037*V(Vccp,Vccn)*V(Vccp,Vccn) ) -5000*I(VreadIo) }

*    E_RO_3_VAL_VOH RO_3_VAL_VOH 0 PWL(1) VCCP VCCN ( 1.8 , 1T ) ( 2.7 , 1T
*+) ( 5.0 , 1T )
    *10G specified instead of 1T to allow convergence with PSPICE:
    E_RO_3_VAL_VOH RO_3_VAL_VOH 0 VALUE={10G}
 
    R_DELAY_VOD VREF VB_D_VOD {R_DELAY}
    R_ICCSAT_HIGH ICC_OUT_HIGH 0 1K
    RO_2 VB_3 VB_2 1m
    R_RISE_FALL VREF VB_D_G_RF {R_RISE_FALL}
    RO_1 VREF VB_2 {RO_1}
    RPROT_IN_P_VCCP NET242 VCCP 15K
    RPROT_IN_M_VCCP VCCP NET390 15K
    R_ICCSAT_LOW ICC_OUT_LOW 0 1K
    RD1 VCCP_ENHANCED VO_DIFF_MINUS {RD}
    RD2 VCCP_ENHANCED VO_DIFF_PLUS {RD}
    R_DELAY_VCC VREF VB_D_VOD_VCC {R_DELAY}
    R1_REF NET370 NET400 1Meg
    R_GAIN VB_D_G VREF {R1}
    RPROT_IN_M_VCCN VCCN NET404 15K
    R2_REF NET400 NET406 1Meg
    RPROT_IN_P_VCCN NET253 VCCN 15K
    
*    G_IIB_VP VREF VP PWL(1) VCCP VCCN ( 1.8 , 25n ) ( 2.7 , 25n ) ( 5.0 ,
*+30n )
    G_IIB_VP VREF VP VALUE={TABLE( V(VCCP,VCCN) , 1.8 , 25n , 2.7 , 25n , 5.0 , 30n )}

*    G_IIB_VM VREF VM PWL(1) VCCP VCCN ( 1.8 , 25n ) ( 2.7 , 25n ) ( 5.0 ,
*+30n )
    G_IIB_VM VREF VM VALUE={TABLE( V(VCCP,VCCN) , 1.8 , 25n , 2.7 , 25n , 5.0 , 30n )}

    G_IOUT_SOURCED VCCP 0 VALUE={IF(I(VreadIo)>0, I(VreadIo),0)}
    G_ICCSAT VCCP VCCN VALUE={IF( V(VS)>V(Vccp,Vccn)/2 ,
+V(Icc_out_high), V(Icc_out_low) ) }
    G_GAIN VREF VB_D_G VB_D_VOD_VCC VREF 1
    G_DELAY_VOD VB_D_VOD VREF VO_DIFF_MINUS VO_DIFF_PLUS {1/R_DELAY}
    G_RISE_FALL VREF VB_D_G_RF VB_D_G VREF {1/R_RISE_FALL}
    G_OUT VREF VB_2 VB_D_G_RF VREF {1/RO_1}
    G_IOUT_SINKED VCCN 0 VALUE={IF(I(VreadIo)>0, 0, I(VreadIo))}
    G_DELAY_VCC VB_D_VOD_VCC VREF VREF VB_D_VOD {1/R_DELAY}


*******************************************************************************
*
.PARAM A0=100k 
.PARAM IEE=2.7u
.PARAM W=235u
.PARAM L=10u
.PARAM gm_mos=7.9773E-05
.PARAM RD=20k
.PARAM R_delay={RD}
.PARAM R1={A0/(gm_mos*RD)}
.PARAM R_rise_fall=100
.PARAM Ro_1=10
.PARAM VCCP_enhance=-360m
.PARAM VCCN_enhance=-500m
.PARAM V_DPROT=150m
.PARAM Vd_compensazione=-788.4u

.MODEL MOS_N  NMOS LEVEL=1  VTO=+0.65  KP=100E-6
.MODEL DIODE_rf D LEVEL=1  IS=10E-15 N=1 CJO=10f
.MODEL DIODE_NOVd D LEVEL=1  IS=10E-15 N=0.001 
.MODEL DIODE_VLIM D LEVEL=1  IS=0.8E-15   
.MODEL DIODE_ILIM D LEVEL=1  IS=10E-15 

.PARAM CAP_scale__C_RISE=100p
.PARAM CAP_scale__C_FALL=100p
.PARAM CAP_scale__C_VOD=10p
.PARAM CAP_scale__C_VCC=10p
*
*******************************************************************************

.ENDS LMV331


*******************************************************
******* SUBCKT VOLTAGE CONTROLLED CAPACITOR for SPICE
*******************************************************
.SUBCKT VCCAP_PSPICE Vctrl_plus Vctrl_minus Vout_plus Vout_minus  
+ PARAMS: CAP_scale=1u  Rserie=1
EVin 2 0 VALUE={1/V(Vctrl_plus,Vctrl_minus)}
EV2 8 Vout_plus POLY(2) 6 0 2 0 0 0 0 0 1 0 0 0 0 0
RR1 8 Vout_minus {Rserie}
GI1 0 6 Vout_minus 8 {1/Rserie}
RR2 0 6 100G 
CC1 6 0 {CAP_scale}  
.ENDS VCCAP_PSPICE
*********************************************************


