*SD57030_rev1_0
*05/27/2016
*STMicroelectronics 
*port 1 = GATE , 2 = Drain , 3 = Source
*
.SUBCKT  SD57030 10 20 30
LGATE 10  11     0.5N
RGATE 11  12     0.5
CG    10  30     2P
CRSS  12  17    2P
CISS  12  14     58P
LS    14  30     0.04N
CS    14  30     .164P
R     17  13     100
LD    17  20     0.3N
CD    20  30     1P
MOS   13  12  14  14     mos_57030  L=.6UM W= 78mM 
JFET  17  14  13         jf_57030		  
DBODY 14  17             d_57030		    

.MODEL mos_57030 nmos (vto=3 KP=2E-5 LAMBDA=0.15 RD=0.125 RS=0.125)
.MODEL jf_57030  njf  (VTO=-5 BETA=6 LAMBDA=1)
.MODEL d_57030  d    (CJO=85p RS=0.25 VJ=.4 M=0.25 BV=80)

.ENDS

