*SD2931_10_rev1_0
*November 7 ,2013
*STMicroelectronics 
*port 1 = GATE , 2 = Drain , 3 = Source
*
.SUBCKT  SD2931_10 10 20 30
LGATE1 10  11     .3N
RGATE1 11  12     .3
CG1    10  30     .5P
CRSS1  12  17    13.2P
CISS1  12  14     422P
LS1    14  30     0.3N
CS1    14  30     .02P
R1     17  13     1K
LD1    17  20     .1N
CD1    20  30     .5P
MOS1   13  12  14  14     mos_1931  L=.2UM W= 700mM 
JFET1  17  14  13         jf_1931		  
DBODY1 14  17             d_1931
.MODEL mos_1931 nmos (vto=2.156 KP=7.68E-7 LAMBDA=.005 RD=0 RS=0)
.MODEL jf_1931  njf  (VTO=-4.19 BETA=2.17 LAMBDA=1.06 Rd=.1 Rs=.1)
.MODEL d_1931  d    (CJO=1000p RS=0.25 VJ=1.88 M=0.50904 BV=142)

.ENDS

