*PD57018E_rev1_0
*10/28/2009
*STMicroelectronics 
*port 1 = GATE , 2 = Drain , 3 = Source
*
.SUBCKT  PD57018E 10 20 30
LGATE 10  11     .35N
RGATE 11  12     .15
CG    10  30     2P
CRSS  12  17    1.3P
CISS  12  14     34.5P
LS    14  30     0.06N
CS    14  30     .1P
R     17  13     100K
LD    17  20     .9N
CD    20  30     2P
MOS   13  12  14  14     mos_57018  L=.8UM W= 42mM 
JFET  17  14  13         jf_57018		  
DBODY 14  17             d_57018		    

.MODEL mos_57018 nmos (vto=3.0 KP=1.5E-5 LAMBDA=0.15 RD=0.24 RS=0.24)
.MODEL jf_57018  njf  (VTO=-6.8 BETA=.1 LAMBDA=4.5)
.MODEL d_57018  d    (CJO=68p RS=0.25 VJ=.4 M=0.304 BV=80)

.ENDS

