Datasheet

Automotive STK615N‑channel 40 V, 0.48 mΩ max., 672 A STripFET F8 Power MOSFET in a PowerLeaded 8x8 package

6 - December 2025

DS14222_STK615N4F8AG

Features


Order code	V_DS	R_DS(on) max.	I_D
STK615N4F8AG	40 V	0.48 mΩ at 10 V	672 A

AEC-Q101 qualified
MSL1 grade
175 °C maximum operating junction temperature
100% avalanche tested
Low gate charge Q_g

Applications

Automotive motor control
Body and convenience
Chassis and safety
Power train for ICE

Description

The STK615N4F8AG is a 40 V N-channel enhancement mode Power MOSFET designed in STripFET F8 technology featuring an enhanced trench gate structure.

It ensures a state-of-the-art of figure of merit for very low on-state resistance while reducing internal capacitances and gate charge for faster and more efficient switching.


Product status link
STK615N4F8AG


Product summary
Order code	STK615N4F8AG
Marking¹	615N4F8
Package	PowerLeaded 8x8
Packing	Tape and reel

¹ Engineering samples are clearly identified with a dedicated special symbol in the marking of each unit.

Electrical ratings

Table 1. Absolute maximum ratings (at T_C = 25 °C unless otherwise specified)
Symbol	Parameter	Value	Unit
V_DS	Drain-source voltage	40	V
V_GS	Gate-source voltage	±20	V
I_D^¹	Drain current (continuous) at T_C = 25 °C^²	672	A
	Drain current (continuous) at T_C = 100 °C^²	475
	Drain current (continuous) at T_C = 25 °C³	200
I_DM^¹ ^² ⁴	Drain current (pulsed), t_p = 10 µs	2688	A
P_TOT	Total power dissipation at T_C = 25 °C	390	W
I_AS	Single pulse avalanche current (pulse width limited by T_J max.)	90	A
E_AS	Single pulse avalanche energy (starting T_J = 25 °C, I_D = 90 A, R_Gmin = 25 Ω)	1779	mJ
T_J	Operating junction temperature range	-55 to 175	°C
T_stg	Storage temperature range	-55 to 175	°C

Table 2. Thermal data
Symbol	Parameter	Value	Unit
R_thJA⁵	Thermal resistance, junction-to-ambient (on 2s2p FR-4 board vertical in still area)	13.8	°C/W
R_thJC	Thermal resistance, junction-to-case	0.39	°C/W

¹ Specified by design, not tested in production.

² This is the theoretical current value only related to the silicon.

³ This current value is limited by package.

⁴ Pulse width is limited by safe operating area.

⁵ Defined according to JEDEC standards (JESD51-5, -7).

Electrical characteristics

T_J = 25 °C unless otherwise specified.

Table 3. On/off states
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
V_(BR)DSS	Drain-source breakdown voltage	V_GS = 0 V, I_D = 1 mA	40	-	-	V
I_DSS	Zero gate voltage drain current	V_DS = 40 V, V_GS = 0 V	-	-	1	µA
I_DSS	Zero gate voltage drain current	V_DS = 40 V, V_GS = 0 V, T_J = 125°C¹	-	-	100	µA
I_GSS	Gate-body leakage current	V_GS = 20 V, V_DS = 0 V	-	-	100	nA
V_GS(th)	Gate threshold voltage	V_DS = V_GS, I_D = 250 μA	2	-	4	V
R_DS(on)	Static drain-source on-resistance	V_GS = 10 V, I_D = 90 A	-	0.35	0.48	mΩ

Table 4. Dynamic
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
C_iss^²	Input capacitance	V_DS = 25 V, f = 1 MHz, V_GS = 0 V	-	13000	-	pF
C_oss^²	Output capacitance		-	3400	-	pF
C_rss^²	Reverse transfer capacitance		-	85	-	pF
Q_g^²	Total gate charge	V_DD = 20 V, I_D = 180 A, V_GS = 0 to 10 V	-	162	-	nC
Q_gs^²	Gate-source charge		-	62	-	nC
Q_gd^²	Gate-drain charge		-	20	-	nC

Table 5. Switching times
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
t_d(on)^³	Turn-on delay time	V_DD = 20 V, I_D = 90 A, R_G = 4.7 Ω, V_GS = 10 V	-	36	-	ns
t_r^³	Rise time		-	21	-	ns
t_d(off)^³	Turn-off delay time		-	93	-	ns
t_f^³	Fall time		-	30	-	ns

Table 6. Source-drain diode
Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
I_SD^⁴	Forward on current (continuous)	T_C = 25 °C	-		240	A
V_SD	Forward on voltage	I_SD = 90 A, V_GS = 0 V	-		1.1	V
t_rr^⁴	Reverse recovery time	I_D = 90 A, di/dt = 100 A/µs, V_DD = 32 V	-	84		ns
Q_rr^⁴	Reverse recovery charge		-	143		nC
I_RRM^⁴	Reverse recovery current		-	3.4		A

¹ Specified by design and evaluated by characterization, not tested in production.

² Specified by design and evaluated by characterization, not tested in production.

³ Specified by design and evaluated by characterization, not tested in production.

⁴ Specified by design and evaluated by characterization, not tested in production.

Electrical characteristics (curves)


Figure 1. Total power dissipation	Figure 2. Drain current vs case temperature


Figure 3. Safe operating area	Figure 4. Normalized transient thermal impedance


Figure 5. Typical output characteristics	Figure 6. Typical transfer characteristics


Figure 7. Typical on-resistance vs gate-source voltage	Figure 8. Typical gate charge characteristics


Figure 9. Typical capacitance characteristics	Figure 10. Avalanche characteristics


Figure 11. Avalanche energy	Figure 12. Typical drain-source on-resistance


Figure 13. Normalized gate threshold voltage vs temperature	Figure 14. Typical reverse diode forward characteristics


Figure 15. Normalized V_(BR)DSS vs temperature	Figure 16. Normalized on-resistance vs temperature

Package information

To meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions, and product status are available at: www.st.com. ECOPACK is an ST trademark.

PowerLeaded 8x8 package information

Figure 17. PowerLeaded 8x8 package outline

Table 7. PowerLeaded 8x8 mechanical data
Dim.	mm
Dim.	Min.	Typ.	Max.
A			1.85
A1	0.00	0.08	0.15
A2	1.50	1.60	1.70
A3	0.60	0.70	0.80
b	0.90	1.00	1.10
c	0.20		0.25
c1	0.19	0.20	0.21
c2	0.49		0.56
c3	0.48	0.50	0.52
D	6.10	6.20	6.30
D1	4.75	4.90	5.05
D2	3.50	3.65	3.80
D3	0.65	0.75	0.85
D4			0.20
D5	2.90	3.10	3.30
E	7.90	8.00	8.10
E1	6.95	7.10	7.25
E2	6.70	6.80	6.90
E3	2.50	2.60	2.70
E4	0.65	0.80	0.95
E5	1.50	1.70	1.90
e	1.90	2.00	2.10
H	7.85	8.00	8.15
K	0.45	0.55	0.65
K1	1.75	1.90	2.05
L	1.00	1.20	1.30
L1	0.60	0.70	0.80
L2	0.23BSC
R	0.20REF
Ɵ	0°		8°
Ɵ1	6°	10°	14°

Figure 19. PowerLeaded 8x8 recommended footprint (dimensions are in mm)

PowerLeaded 8x8 marking information

Note: Engineering Samples: these samples can be clearly identified by a dedicated special symbol in the marking of each unit. These samples are intended to be used for electrical compatibility evaluation only; usage for any other purpose may be agreed only upon written authorization by ST. ST is not liable for any customer usage in production and/or in reliability qualification trials.

Commercial Samples: fully qualified parts from ST standard production with no usage restrictions.

Revision history

Table 8. Document revision history
Date	Revision	Changes
17-Jan-2023	1	Initial release.
16-Oct-2024	2	Modified title, Features, Applications and Description. Added schematic on cover page. Modified Section 1: Electrical ratings, Section 2: Electrical characteristics. Added Section 2.1: Electrical characteristics (curves). Added Section 3.1.1: PowerLeaded 8x8 marking information. Minor text changes
08-Nov-2024	3	Document classification changed from ST restricted to public. Modified Figure 3. Safe operating area and Figure 7. Typical on-resistance vs gate-source voltage.
09-Jan-2025	4	Updated Figure 6. Typical transfer characteristics. Minor text changes.
14-Mar-2025	5	Updated Figure 6 Typical transfer characteristics.
17-Dec-2025	6	Updated Figure 6 Typical transfer characteristics.

List of tables

Table 1. Absolute maximum ratings (at TC= 25 °C unless otherwise specified)

Table 2. Thermal data

Table 3. On/off states

Table 4. Dynamic

Table 5. Switching times

Table 6. Source-drain diode

Table 7. PowerLeaded 8x8 mechanical data

Table 8. Document revision history

List of figures

Figure 1. Total power dissipation

Figure 2. Drain current vs case temperature

Figure 3. Safe operating area

Figure 4. Normalized transient thermal impedance

Figure 5. Typical output characteristics

Figure 6. Typical transfer characteristics

Figure 7. Typical on-resistance vs gate-source voltage

Figure 8. Typical gate charge characteristics

Figure 9. Typical capacitance characteristics

Figure 10. Avalanche characteristics

Figure 11. Avalanche energy

Figure 12. Typical drain-source on-resistance

Figure 13. Normalized gate threshold voltage vs temperature

Figure 14. Typical reverse diode forward characteristics

Figure 15. Normalized V(BR)DSSvs temperature

Figure 16. Normalized on-resistance vs temperature

Figure 17. PowerLeaded 8x8 package outline

Figure 18. Section details

Figure 19. PowerLeaded 8x8 recommended footprint (dimensions are in mm)

Figure 20. PowerLeaded 8x8 marking information




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