DAC 2022
10-14 July – Moscone West Center – San Francisco, CA, USA | |||||||||||||||||||||||||||||||||||||
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POSTER PRESENTATIONS | ||
Using Formal Verification Signoff for Digital IP | POSTER Gladiator Monday 11 July 5-6 pm PDT Engineering Track poster reception | David Vincenzoni ST presenter |
Ensuring Accurate Crosstalk Analysis using CCS-Noise Liberty Model | Tuesday 12 July 5-6 pm PDT Engineering Track poster reception | Atul Bhargava ST Presenter Rahul Kumar ST main author |
Integrating Liberty model validation, analysis, and visualization as part of library design and characterization | Tuesday July 12 5-6 pm PTD Engineering Track poster reception | Austin Shirley – Tina Durgia Mentor presenters Saurabh Srivastava ST main author |
A unified IP QA methodology to improve validation coverage and throughput | POSTER Gladiator Tuesday 12 July 5-6 pm PTD | Wei Lii Tan Siemens Presenter Lippika Parwani ST main author |
SDR (Simulation-Driven Routing) - A Solution to Get Electromigration Compliant Routing | Tuesday July 12 5-6 pm PDT Engineering track poster reception | Bryan Laborde Cadence Presenter Lippika Parwani ST main author |
On-Chip embedded sensor in 18nm technology to monitor the effects of process variations on standard cells logic and interconnect delays | Wednesday July 13 5-6 pm PDT Engineering Track poster reception | Rohit Kumar Gupta ST presenter Rohit Goel ST Author |
Process Monitoring Blocks (PMB) - for Monitoring Analog Performance | Wednesday July 13 5-6 pm PDT Engineering Track poster reception | Rohit Kumar Gupta ST presenter Priya Ashu Talwar ST Author |
Design-Technology co-optimization to mitigate the technology impact of context-based timing in standard Cell | POSTER Gladiator Wednesday July 13 5-6 pm PDT Engineering Track poster reception | Rohit Kumar Gupta ST Presenter Veny Mahajan ST main author |
Design Intent Driven Analog Routing Methodology | Wednesday July 13 5-6 pm PTD Engineering Track poster reception | Atul Bhargava ST Presenter Rajeev Singh ST main author |
Streamlined solution for CAD views generation & validation of AMS IP for SOC enablement | Wednesday July 13 5-6 pm PDT Engineering Track poster reception | Atul Bhargava ST presenter Lippika Parwani ST Main author |